detailed results (29828 total)

prover file res expected time
sidekick /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop2_ab_reg_max.smt2 (content) timeout unknown 11s
sidekick-dev /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop2_ab_reg_max.smt2 (content) timeout unknown 11s
z3 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop2_ab_reg_max.smt2 (content) sat unknown 0.842s
mc2 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop2_ab_cti_max.smt2 (content) timeout unknown 10s
sidekick /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop2_ab_cti_max.smt2 (content) timeout unknown 11s
sidekick-dev /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop2_ab_cti_max.smt2 (content) timeout unknown 11s
z3 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop2_ab_cti_max.smt2 (content) timeout unknown 11s
mc2 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_reg_max.smt2 (content) timeout unknown 10s
sidekick /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_reg_max.smt2 (content) unsat unknown 2s
sidekick-dev /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_reg_max.smt2 (content) unsat unknown 2s
z3 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_reg_max.smt2 (content) unsat unknown 0.430s
mc2 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_cti_max.smt2 (content) timeout unknown 10.1s
sidekick /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_cti_max.smt2 (content) timeout unknown 11s
sidekick-dev /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_cti_max.smt2 (content) timeout unknown 11s
z3 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop1_ab_cti_max.smt2 (content) timeout unknown 11s
mc2 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_reg_max.smt2 (content) sat unknown 4.8s
sidekick /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_reg_max.smt2 (content) sat unknown 5.4s
sidekick-dev /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_reg_max.smt2 (content) sat unknown 5.5s
z3 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_reg_max.smt2 (content) sat unknown 0.265s
mc2 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_cti_max.smt2 (content) sat unknown 7.2s
sidekick /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_cti_max.smt2 (content) timeout unknown 11s
sidekick-dev /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_cti_max.smt2 (content) timeout unknown 11s
z3 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop3_ab_cti_max.smt2 (content) sat unknown 3.1s
mc2 /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop2_ab_reg_max.smt2 (content) sat unknown 5.3s
sidekick /home/simon/w/sidekick/tests/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.4.prop2_ab_reg_max.smt2 (content) sat unknown 7.5s