detailed results (7457 total)

prover file res expected time
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_elevator.2.prop1_ab_cti_max.smt2 (content) sat unknown 0.023s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_elevator.1.prop1_ab_reg_max.smt2 (content) unsat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_elevator.1.prop1_ab_cti_max.smt2 (content) sat unknown 0.031s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_dyn_partition_ab_reg_max.smt2 (content) sat unknown 0.045s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_driving_phils.5.prop1_ab_reg_max.smt2 (content) sat unknown 0.018s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_driving_phils.4.prop1_ab_reg_max.smt2 (content) sat unknown 0.019s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_driving_phils.3.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_driving_phils.2.prop1_ab_reg_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_driving_phils.1.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_diagonal_v_ab_reg_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_diagonal_v_ab_cti_max.smt2 (content) sat unknown 0.009s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_diagonal_ab_reg_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_diagonal_ab_cti_max.smt2 (content) sat unknown 0.008s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_cyclic_scheduler.4.prop1_ab_reg_max.smt2 (content) unsat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_cyclic_scheduler.4.prop1_ab_cti_max.smt2 (content) sat unknown 0.040s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_cyclic_scheduler.3.prop1_ab_reg_max.smt2 (content) unsat unknown 0.010s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_cyclic_scheduler.3.prop1_ab_cti_max.smt2 (content) sat unknown 0.065s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_cyclic_scheduler.2.prop1_ab_reg_max.smt2 (content) unsat unknown 0.029s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_cyclic_scheduler.2.prop1_ab_cti_max.smt2 (content) sat unknown 0.025s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_cyclic_scheduler.1.prop1_ab_reg_max.smt2 (content) unsat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_counter_v_ab_reg_max.smt2 (content) unsat unknown 0.006s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_counter_v_ab_fp_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_counter_v_ab_cti_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_counter_ab_reg_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_counter_ab_cti_max.smt2 (content) sat unknown 0.021s