detailed results (7457 total)

prover file res expected time
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_blocks.3.prop1_ab_reg_max.smt2 (content) unsat unknown 0.023s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_blocks.3.prop1_ab_fp_max.smt2 (content) sat unknown 2s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_blocks.2.prop1_ab_reg_max.smt2 (content) unsat unknown 0.008s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_blocks.2.prop1_ab_cti_max.smt2 (content) sat unknown 0.056s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bit-vector_ab_cti_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bit-vector_ab_br_max.smt2 (content) sat unknown 0.013s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.8.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.8.prop1_ab_cti_max.smt2 (content) sat unknown 0.049s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.7.prop1_ab_reg_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.7.prop1_ab_cti_max.smt2 (content) sat unknown 0.028s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.6.prop1_ab_reg_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.6.prop1_ab_cti_max.smt2 (content) sat unknown 0.072s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.5.prop1_ab_reg_max.smt2 (content) sat unknown 0.010s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.5.prop1_ab_cti_max.smt2 (content) sat unknown 0.041s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.4.prop1_ab_reg_max.smt2 (content) sat unknown 0.012s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.4.prop1_ab_cti_max.smt2 (content) sat unknown 0.024s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.3.prop1_ab_reg_max.smt2 (content) sat unknown 0.016s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.2.prop1_ab_reg_max.smt2 (content) sat unknown 0.021s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.1.prop1_ab_reg_max.smt2 (content) sat unknown 0.007s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.7.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.7.prop1_ab_cti_max.smt2 (content) sat unknown 0.127s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.6.prop1_ab_reg_max.smt2 (content) sat unknown 0.010s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.6.prop1_ab_cti_max.smt2 (content) sat unknown 0.103s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.5.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
mc2 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.5.prop1_ab_cti_max.smt2 (content) sat unknown 0.089s