detailed results (3102 total)

prover file res expected time
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bit-vector_ab_cti_max.smt2 (content) sat unknown 0.008s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bit-vector_ab_br_max.smt2 (content) sat unknown 0.009s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.8.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.8.prop1_ab_cti_max.smt2 (content) sat unknown 0.025s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.7.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.7.prop1_ab_cti_max.smt2 (content) sat unknown 0.021s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.6.prop1_ab_reg_max.smt2 (content) sat unknown 0.009s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.6.prop1_ab_cti_max.smt2 (content) sat unknown 0.022s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.5.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.5.prop1_ab_cti_max.smt2 (content) sat unknown 0.021s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.4.prop1_ab_reg_max.smt2 (content) sat unknown 0.028s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.4.prop1_ab_cti_max.smt2 (content) sat unknown 0.021s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.3.prop1_ab_reg_max.smt2 (content) sat unknown 0.020s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.2.prop1_ab_reg_max.smt2 (content) sat unknown 0.023s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_bakery.1.prop1_ab_reg_max.smt2 (content) sat unknown 0.024s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.7.prop1_ab_reg_max.smt2 (content) sat unknown 0.009s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.7.prop1_ab_cti_max.smt2 (content) sat unknown 0.055s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.6.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.6.prop1_ab_cti_max.smt2 (content) sat unknown 0.070s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.5.prop1_ab_reg_max.smt2 (content) sat unknown 0.008s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.5.prop1_ab_cti_max.smt2 (content) sat unknown 0.046s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.4.prop1_ab_reg_max.smt2 (content) sat unknown 0.013s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.4.prop1_ab_cti_max.smt2 (content) sat unknown 0.049s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.3.prop1_ab_reg_max.smt2 (content) sat unknown 0.011s
z3 /home/simon/w/smtlib/QF_UF/2018-Goel-hwbench/QF_UF_at.3.prop1_ab_cti_max.smt2 (content) sat unknown 0.053s