detailed results (3296 total)

prover file res expected time
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.induct.smt2 (content) timeout unsat 10s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.induct.smt2 (content) unsat unsat 4.8s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.base.smt2 (content) unsat unsat 0.211s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.base.smt2 (content) unsat unsat 0.026s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.induct.smt2 (content) timeout unsat 10s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.induct.smt2 (content) unsat unsat 1s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.017s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.009s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.induct.smt2 (content) timeout unsat 10s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.induct.smt2 (content) unsat unsat 1.0s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.base.smt2 (content) unsat unsat 0.115s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.base.smt2 (content) unsat unsat 0.021s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.induct.smt2 (content) timeout unsat 10s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.induct.smt2 (content) unsat unsat 0.198s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.007s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.008s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.induct.smt2 (content) timeout unsat 10s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.induct.smt2 (content) unsat unsat 0.832s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.base.smt2 (content) unsat unsat 0.084s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.base.smt2 (content) unsat unsat 0.029s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.induct.smt2 (content) timeout unsat 10s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.induct.smt2 (content) unsat unsat 0.037s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.008s
z3 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.015s
mc2 /home/simon/w/mc2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.main_invar.induct.smt2 (content) timeout unsat 10s