detailed results (1648 total)

prover file res expected time
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_8clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.027s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_8clocks.main_invar.induct.smt2 (content) timeout unsat 11.1s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_8clocks.main_invar.base.smt2 (content) unsat unsat 0.142s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_7clocks.worst_case_skew.induct.smt2 (content) timeout unsat 11.5s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_7clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.017s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_7clocks.main_invar.induct.smt2 (content) timeout unsat 12s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_7clocks.main_invar.base.smt2 (content) unsat unsat 0.119s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_6clocks.worst_case_skew.induct.smt2 (content) timeout unsat 11.1s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_6clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.024s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_6clocks.main_invar.induct.smt2 (content) unsat unsat 11s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_6clocks.main_invar.base.smt2 (content) unsat unsat 0.091s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.worst_case_skew.induct.smt2 (content) unsat unsat 4.5s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.019s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.induct.smt2 (content) unsat unsat 10s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.base.smt2 (content) unsat unsat 0.057s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.induct.smt2 (content) unsat unsat 2.2s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.019s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.induct.smt2 (content) unsat unsat 2.8s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.base.smt2 (content) unsat unsat 0.045s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.induct.smt2 (content) unsat unsat 0.298s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.021s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.induct.smt2 (content) unsat unsat 1.6s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.base.smt2 (content) unsat unsat 0.036s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.induct.smt2 (content) unsat unsat 0.068s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.013s