detailed results (455 total)

prover file res expected time
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_7clocks.main_invar.base.smt2 (content) unsat unsat 0.097s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_6clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.026s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_6clocks.main_invar.induct.smt2 (content) unsat unsat 8.0s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_6clocks.main_invar.base.smt2 (content) unsat unsat 0.068s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.worst_case_skew.induct.smt2 (content) unsat unsat 4.6s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.017s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.induct.smt2 (content) unsat unsat 9.6s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_5clocks.main_invar.base.smt2 (content) unsat unsat 0.041s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.induct.smt2 (content) unsat unsat 1.3s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.017s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.induct.smt2 (content) unsat unsat 3.6s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_4clocks.main_invar.base.smt2 (content) unsat unsat 0.034s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.induct.smt2 (content) unsat unsat 0.396s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.023s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.induct.smt2 (content) unsat unsat 1.5s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_3clocks.main_invar.base.smt2 (content) unsat unsat 0.033s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.induct.smt2 (content) unsat unsat 0.069s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.020s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.main_invar.induct.smt2 (content) unsat unsat 0.327s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_2clocks.main_invar.base.smt2 (content) unsat unsat 0.022s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_10clocks.worst_case_skew.base.smt2 (content) unsat unsat 0.022s
z3 /home/simon/w/sidekick2/tests/QF_LRA/clock_synchro/clocksynchro_10clocks.main_invar.base.smt2 (content) unsat unsat 0.201s
z3 /home/simon/w/sidekick2/tests/QF_LRA/check/bignum_lra2.smt2 (content) unsat unsat 0.023s
z3 /home/simon/w/sidekick2/tests/QF_LRA/TM/p5-driverlogNumeric_s9.smt2 (content) unsat unsat 0.336s
z3 /home/simon/w/sidekick2/tests/QF_LRA/LassoRanker/Ultimate/NonTerminationDifficult.bpl_Iteration1_Lasso_7-phaseTemplate.smt2 (content) unsat unsat 6.6s